6Layer PCB Stack
Why use 6 layers ?
Before starting to build the board, I think it is important to consider the reasons why people might want to use a 6-layer PCB. There are several reasons other than simply adding more paths for the signals.The most basic version of the 6-layer goodness layer will use the same approach as the SIG/PWR/GND/SIG goodness layer in a 4-layer board, except that the signals will be placed on the other two in the centre of the goodness layer. In fact, from an EMC point of view, SIGIPWR/SIG/SIG/GND/SIG is the worst 6-layer PCB luer layer, and it's probably only suitable for boards running at DC.
Some of the reasons I chose a 6-layer board over a 4-layer board include
You are using a 4-layer SIG+PWR/GND/GND/SIG+PWR good layer, you snow to leave more room for components on the surface. Placing the PWR and SIG in the inner layers allows for more decoupling through the PWR/GND plane pair.
For mixed-signal boards, you can dedicate the entire surface layer to the analogue interface and there will be an additional internal layer for slower digital wiring.
You are working with a high-speed board with a high number of I/0s and you want a good way to separate the signals into different layers of the board. You can implement the same strategy in #1
Add only one additional signal layer in all of these configurations. The other layer is dedicated to the GND plane, the power rails, or the all-power plane. Your good layer will be the main determinant of EMC and signal integrity in the board, as well as layout and routing strategy!
Read this article for more tips on 6-layer PCB stacks and their EMC characteristics!
How to route signals?
Before we start routing, let's take a look at the typical PCB stacks you will use in a 6-layer PCB.
In this good layer, the top and bottom layers are on a thin dielectric, so these layers should be used for impedance control signals. 10 mils is probably the thickest dielectric you should use, as this will require microstrip routing with a width of 15-20 mils, depending on the dielectric constant. If you are wiring a digital interface with differential pairs, the spacing will also allow for a reduced alignment width which will allow you to wire into finer spaced components. As an example, we use a version of the above good layer for many of our smaller networking products that support multiple multi-gigabit Ethernet channels.
If you need to use smaller trace widths in the outer layer, simply reduce the outer dielectric thickness (perhaps as low as 4-5 mils) and then add some thickness to the L3-L4 dielectric to meet your board thickness targets. The next point to consider is how to route the power supply.
How to route the power supply?
In the above example of a 6-layer PCB good layer, there is an entire layer dedicated to PWRs.In a 6-layer PCB, this is usually a good practice as it frees up surface area for components and makes it easier to power those components through vias.
Just as an example, take a look at the BGA shown below. this particular BGA is typical of high-speed interface controllers that need to supply a lot of current over multiple voltages, so many of the balls will be connected to power and ground. With something like an FPGA, you may find multiple pins for power and ground throughout its package. By dedicating a single layer to the power supply, you can break the plane down into tracks so that multiple voltages can be used at high currents if necessary. This eliminates the need to reroute these power rails at different voltages, preventing additional EMI issues.
In this FPGA BGA package you can see multiple pins in the central area dedicated to GND and multiple VCC rails The GND pin can be connected directly to the plane on layer 2 and the VCC pin can be connected to a different power rail on layer 3.
Note that just because you place the power supply on an internal layer does not mean that you cannot place the power supply in other locations. You can still route the power supply on other signal layers using copper-layered power rails or thicker alignments.
